1. Technical Field
This disclosure relates to non-volatile storage devices. Specifically, this disclosure relates to improving data consistency/integrity in non-volatile storage devices.
2. Description of Related Art
Prior implementations of logical-to-physical mapping in non-volatile storage devices typically sized a logical mapping unit (LMU) to the size of an atomic write. That is, a write to an LMU (e.g., a logical address in a mapping table entry) corresponded to an atomic physical write/program operation on the storage media (e.g., programming a page). Therefore, a write to a logical address was either completed or not completed if power was lost at any point in time. Where the size of a logical mapping unit exceeds the size of an atomic physical write, it is possible for portions of the logical mapping unit to not be written before power is lost. As a result, when the storage system is powered on after a power loss, the system must determine which logical mapping units were partially written and revert to a prior version of the partially written logical mapping unit(s). The determination of partially-valid logical mapping units can result in significant delays while powering on the system; thus significantly impacting initial host responsiveness.